Published papers
Number of published data : 154
No. Classification Refereed paper Title Authorship Author Journal Volume/issue/page Publication date ISSN DOI URL
1 Paper
Yes
Toward Agile Information and Communication Framework for the Post-COVID-19 Era
Joint
Celimuge Wu, Chunrong Peng, Zhaoyang Du, Liming Gao, Tsutomu Yoshinaga, and Yusheng Ji
IEEE Open Journal of the Computer Society
Early Access/ in press, 10 pages-
2021

10.1109/OJCS.2021.3102045

2 Paper
Yes
A Failsoft Scheme for Mobile Live Streaming by Scalable Video Coding
Joint
H. Okada, M. Yoshimi, C. Wu, and T. Yoshinaga
IEICE Transactions Information and Systems
to appear
2021/12



3 Paper
Yes
A Brief Review of Multipath TCP for Vehicular Networks
Joint
Luomeng Chao, Celimuge Wu, Tsutomu Yoshinaga, Wugedele Bao and Yusheng Ji
MDPI Open Access Journal Sensors
21/ 8, 1-34
2021/04/15

10.3390/s21082793
URL
4 Paper
Yes
Multi-Channel Blockchain Scheme for Internet of Vehicles
Joint
Liming Gao, Celimuge Wu, Tsutomu Yoshinaga, Xianfu Chen, and Yusheng Ji
IEEE Open Journal of the Computer Society
2, 192-203
2021/03/31



5 Paper
Yes
Coexistence Analysis of D2D-Unlicensed and Wi-Fi Communications
Joint
Ganggui Wang, Celimuge Wu , Tsutomu Yoshinaga, Rui Yin, Tutomu Murase, Kok-Lim Alvin Yau, Wugedele Bao, and Yusheng Ji
Wireless Communications and Mobile Computing Journal
2021/ Article ID 5523273, 1-11
2021/03/25

10.1155/2021/5523273

6 Paper
Yes
A Routing Protocol for UAV-assisted Vehicular Delay Tolerant Networks
Joint
Zhaoyang Du; Celimuge Wu; Tsutomu Yoshinaga; Xianfu Chen; Wang Xiaoyan; Kok-Lim Alvin Yau; Yusheng Ji
IEEE Open Journal of the Computer Society
Early Access, 1-14
2021/01/28
2644-1268
10.1109/OJCS.2021.3054759

7 Paper
Yes
Collaborative Learning of Communication Routes in Edge-enabled Multi-access Vehicular Environment
Joint
Celimuge Wu, Zhi Liu, Fuqiang Liu, Tsutomu Yoshinaga, Yusheng Ji, Jie Li
IEEE Transactions on Cognitive Communications and Networking
Early Access
2020/06/15

10.1109/TCCN.2020.3002253

8 Paper
Yes
Federated Learning for Vehicular Internet of Things: Recent Advances and Open Issues
Joint
Zhaoyang Du ; Celimuge Wu ; Tsutomu Yoshinaga ; Kok-Lim Alvin Yau ; Yusheng Ji ; Jie Li
IEEE Open Journal of the Computer Society
1/ 61, 45-61
2020/05/06

10.1109/OJCS.2020.2992630

9 Paper
Yes
SDN-based Handover Scheme in Cellular/IEEE 802.11p Hybrid Vehicular Networks
Joint
Ran Duo, Celimuge Wu, Tsutomu Yoshinaga, Jiefang Zhang and Yusheng Ji
MDPI Open Access Journal Sensors
20/ 4, 1-17
2020/02/17

10.3390/s20041082

10 Paper
Yes
A VDTN scheme with enhanced buffer management
Joint
Zhaoyang Du, Celimuge Wu, Xianfu Chen, Xiaoyan Wang, Tsutomu Yoshinaga, and Yusheng Ji
Wireless Networks
26, 1537-1548
2020/01/05

10.1007/s11276-019-02241-x
URL
11 Paper
Yes
Integrating Licensed and Unlicensed Spectrum in Internet-of-Vehicles with Mobile Edge Computing

Celimuge Wu, Xianfu Chen, Tsutomu Yoshinaga, Yusheng Ji, and Yan Zhang
IEEE Network Magazine
33/ 4, 48-53
2019/07/31

10.1109/MNET.2019.1800453
URL
12 Paper
Yes
Decentralized Trust Evaluation in Vehicular Internet of Things
Joint
Siri Guleng, Celimuge Wu, Xianfu Chen, Xiaoyan Wang, Tsutomu Yoshinaga, Yusheng Ji
IEEE Access
2019/ 7, 15980-15988
2019/02

10.1109/ACCESS.2019.2893262
URL
13 Paper
Yes
Computational Intelligence Inspired Data Delivery for Vehicle-to-roadside Communications
Joint
Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji, Yan Zhang
IEEE Transactions on Vehicular Technology
67/ 12, 12038-12048
2018/12

10.1109/TVT.2018.2871606

14 Paper
Yes
System Performance Assessment and Sizing for Cloud-based
Data Backup
Joint
Y. Taguchi, and T. Yoshinaga
Journal of Information Processing (ACS)
11/ 2, 1-10
2018/11



15 Paper
Yes
Spatial Intelligence toward Trustworthy Vehicular IoT
Joint
Celimuge Wu, Zhi Liu, Di Zhang, Tsutomu Yoshinaga, Yusheng Ji
IEEE Communications Magazine
56/ 10, 22-27
2018/10

10.1109/MCOM.2018.1800089

16 Paper
Yes
A Context-Aware Edge-Based VANET Communication Scheme for ITS
Joint
Chang An, Celimuge Wu, Tsutomu Yoshinaga, Xianfu Chen and Yusheng Ji
Open Access Journal Sensors 2018
18/ 7, 1-15
2018/06/24
1424-8220
10.3390/s18072022

17 Paper
Yes
Learning for Adaptive Anycast in Vehicular Delay Tolerant Networks
Joint
Celimuge Wu, Tsutomu Yoshinaga, Dabhur Bayar, and Yusheng Ji
Journal of Ambient Intelligence and Humanized Computing
1-10
2018/05/12
1868-5145
https://doi.org/10.1007/s12652-018-0819-y
URL
18 Paper
Yes
Cluster-based Content Distribution Integrating LTE and IEEE 802.11p with Fuzzy Logic and Q-learning
Joint
Celimuge Wu, Tsutomu Yoshinaga, Xianfu Chen, Lin Zhang, and
Yusheng Ji
IEEE Computational Intelligence Magazine
13/ 1, 41-50
2018/01/10
1556-603X
10.1109/MCI.2017.2773818

19 Paper
Yes
Color-based Cooperative Cache and its Routing Scheme for Telco-CDNs

Takuma Nakajima, Masato Yoshimi, Celimuge Wu and Tsutomu Yoshinaga
IEICE Trans. on Information and Systems
E100-D/ 12, 2847-2856
2017/12



20 Paper
Yes
Pipelined Parallel Join and Its FPGA-Based Acceleration
Joint
Masato YOSHIMI, Yasin OGE, and Tsutomu YOSHINAGA
ACM Transactions on Reconfigurable Technology and Systems
10/ 4, 28:1-28:8
2017/12

10.1145/3079759

21 Paper
Yes
Multihop Data Delivery Virtualization for Green Decentralized IoT
Joint
Lifeng Zhang, Celimuge Wu, Tsutomu Yoshinaga, Xianfu Chen,
Tutomu Murase, and Yusheng Ji
Wireless Communications and Mobile Computing
2017/ 9805784, 9 pages-
2017/12/26

10.1155/2017/9805784

22 Paper
Yes
Vehicular Multi-Access Edge Computing With Licensed Sub-6 GHz, IEEE 802.11p and mmWave
Joint
Qitu Hu, Celimuge Wu, Xiaobing Zhao, Xianfu Chen, Yusheng Ji, Tsutomu Yoshinaga
IEEE Access
6/ 1, 1995-2004
2017/12/04

10.1109/ACCESS.2017.2781263

23 Paper
Yes
Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism
Joint
A. Ben Ahmed, Tsutomu Yoshinaga, A. Ben Abdallah
IEEE Transactions on Emerging Topics in Computing (April-June 2020)
8/ 2, 533-544
2017/08/09
2168-750
10.1109/TETC.2017.2737016
URL
24 Paper
Yes
A Reinforcement Learning-based Data Storage Scheme for Vehicular Ad Hoc Networks
Joint
Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji, Tutomu Murase, and Yan Zhang
IEEE Transactions on Vehicular Technology
66/ 7, 6336-6348
2017/07/01

10.1109/TVT.2016.2643665

25 Paper
Yes
A Cooperative Forwarding Scheme for VANET Routing Protocols
Joint
Celimuge Wu, Yusheng Ji, and Tsutomu Yoshinaga
ZTE Communications
14/ 3, 13-21
2016/08/25
1673-5188
10.399/j
URL
26 Paper
Yes
Design and Evaluation of a Configurable Query Processing Hardware for Data Streams
Joint
Yasin OGE, Masato YOSHIMI, Takefumi MIYOSHI, Hideyuki KAWASHIMA, Hidetsugu IRIE, and Tsutomu YOSHINAGA
IEICE Transactions on Information and Systems
Vol.E98-D/ 12, 2207-2217
2015/12/01

10.1587/transinf.2015EDP7203

27 Paper
Yes
Packet Size-aware Broadcasting in VANETs with Fuzzy Logic and RL-based Parameter Adaptation
Joint
Celimuge Wu, Xianfu Chen, Yusheng Ji, Fuqiang Liu, Satoshi Ohzahata, and Tsutomu Yoshinaga
IEEE Access
3, 2481-2491
2015/11/23
2169-3536
10.1109/ACCESS.2015.2502949

28 Paper
Yes
An Implementation of Cloud Environment with Adaptive Computing Resource Sharing
Joint
Takuma NAKAJIMA, Masato YOSHIMI, Hidetsugu IRIE, and Tsutomu
YOSHINAGA
IEICE Trans. on Information Systems
J98-D/ 8, 1142-1150
2015/08/05

10.14923/transinfj.2014JDP7123

29 Paper
Yes
UDU-L: An Intutive Device Access Method by Laser Pointing

Masato KOGI, Yuta OKI, Tsutomu YOSHINAGA, and Hidetsugu IRIE
IEICE TRANSACTIONS on Information and Systems (Japanese edition)
Vol. J97-D/ No.1, 155-164
2014/01



30 Paper
Yes
A Fully Optical Ring Network-on-Chip with Static and Dynamic
Wavelength Allocation

Ahmadou Dit ADI CISSE, Michihiro KOIBUCHI, Masato YOSHIMI, Hidetsugu IRIE, and Tsutomu YOSHINAGA
IEICE Trans. on Information and Systems
E96-D/ 12, 2545-2555
2013/12



31 Paper
Yes
FLAT: An MPI Friendly GPGPU Programming Framework for GPU Clusters

Keigo Shima, Masato Yoshimi, Takefumi MIYOSHI, Masaaki Kondo, Hidetsugu IRIE, Hiroki Honda, and Tsutomu Yoshinaga
IPSJ Trans. on Computing System
6/ 4, 105-116
2013/10



32 Paper
Yes
A Novel Wire-activity-aware Floorplanner for 3D-stacked Processor

H. Irie, T. Inaba, H. Houchi, D. Fujiwara, K. Mazima, M. Yoshimi, and T. Yoshinaga
IPSJ Trans. on Advanced Computing Systems
6/ 3, 131-145
2013/09/25



33 Paper
Yes
Using Cache Reuse Characteristics for Prefetcher Throttling

Hidetsugu IRIE, Takefumi MIYOSHI, Goki HONJO, Kei HIRAKI, Tsutomu YOSHINAGA
IEICE Trans. on Information and Systems
E95-D/ 12, 2928-2938
2012/12



34 Paper
Yes
Design and Implementation of a Handshake Join Architecture on FPGA

Oge Yasin, Takefumi MIYOSHI, Hideyuki Kawashima, Tsutomu Yoshinaga
IEICE Trans. on Information and Systems
E95-D/ 12, 2919-2927
2012/12



35 Paper
Yes
Computation-Communication Overlap of Linpack on a GPU-accelerated PC Cluster

J. Ohmura, T.Miyoshi, H.Irie, and T. Yoshianga
IEICE Trans. on Information and Systems
E94-D/ 12, 2319-2327
2011/12



36 Paper
Yes
Realizing Window Join Operator by using FPGA

Takefumi MIYOSHI, Yuta TERADA, Hideyuki KAWASHIMA, and Tsutomu
YOSHINAGA
IEICE Trans. on Communications
J94-B/ 10, 1313-1322
2011/10



37 Paper
Yes
An Efficient Path Setup for a Hybrid Photonic Network-on-Chip

C. A. D. Adi, H. Matsutani, M. Koibuchi, H. Irie, T. Miyoshi, and T. Yoshinaga
International Journal of Networking and Computing
1/ 2, 244-259
2011/07



38 Paper
Yes
A Dynamic Reconfigurable Processor Architecture for Stream Processing Engine

Takefumi Miyoshi, Yuta Terada, Hideyuki Kawashima, and Tsutomu Yoshinaga
IPSJ TOD
4/ 2, 35-51
2011/07



39 Paper
Yes
Prediction Router: A Low-Latency On-Chip Router Architecture with Multiple Predictors

Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga
IEEE Transactions on Computers
60/ 6, 783-799
2011/06



40 Paper
Yes
Control Mechanism with Virtual Remote Replication on 3 Data Center Storage System

N. Maki, Y. Hiraiwa, T. Imazu, and T. Yoshinaga
Journal of the IPSJ
52/ 2, 1-13
2011/02



41 Paper
Yes
Evaluation of Prediction Router for Low-Latency On-Chip Networks

Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga
IPSJ Trans. on Advanced Computing Systems
2/ 3, 26-38
2009/09



42 Paper
Yes
Remote Sharing Support for DLNA Appliances with Rule-Based Access Control Functions

Daigo Mutoh and Tsutomu Yoshinaga
Journal of IPSJ
49/ 12, 3985-3996
2008/12



43 Paper
No
Network Reconfiguration Protocols for Fault-Tolerant and Adaptive Deadlock-Recovery Routing

T.Yoshinaga and Y. Nishimura
Trans. on IEICE, D
91-D/ 12, 2881-2891
2008/12



44 Paper
Yes
A Low-Latency Network-on-chip using Predictive Routers

M. Koibuchi, T. Yoshinaga, K. Murakami, H. Matsutani, and H. Amano
Trans. on IPSJ (ACS)
1/ 2, 59-69
2008/08



45 Paper
Yes
Latency Reduction Utilizing Dynamic Communication Prediction in 2-D Tori

T.Yoshinaga, H. Murakami, and M. Koibuchi
Trans. on Advanced Computing Systems
1/ 1 (ACS22), 28-39
2008/05



46 Paper
Yes
The QC-2 Parallel Queue Processor Architecture

B.A. Abderazek, A. Canedo, T. Yoshinaga, and M. Sowa
Journal of Parallel and Distributed Computing
68/ 2, 235-245
2008/02



47 Paper
Yes
High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core

Ben A. Abderazek, Tsutomu Yoshinaga, Masahiro Sowa
The Journal of Supercomputing
38/ 1, 3-15
2006/10



48 Paper
Yes
Improving Linpack Performance on SMP Clusters with Asynchronous MPI Programming

Ta Quoc Viet, Tsutomu Yoshinaga
IPSJ Trans. ACS
47/ SIG 12 (ACS 15), 340-348
2006/09



49 Paper
Yes
Parallel Queue Processor Architecture Based on Produced Order Computation Model

Masahiro Sowa, Ben A. Abderazek, Tsutomu Yoshinaga
The Journal of Supercomputing, Springer Science+Business Media Inc.
32/ 3, 217-229
2005/06



50 Paper
Yes
Construction of Hybrid MPI-OpenMP Solutions for SMP Clusters

Ta Quoc Viet, Tsutomu Yoshinaga, Ben A. Abderazek, Masahiro Sowa
Transactions on Advanced Computing Systems
46/ ACS8, 25-37
2005/01



51 Paper
Yes
Fault-Tolerant Adaptive Deadlock-Recovery Routing
for k-ary n-cube Networks

T. Yoshinaga, H. Hosogoshi, and M. Sowa
IPSJ Transactions on Advanced Computing Systems
45/ SIG 11(ACS7), 408-419
2004/10



52 Paper
Yes
High Speed Receiving Process of MPI by Receiving Message Prediction

Y. Iwamoto, R. Adachi, K. Ootsu, T. Yoshianga, and T. Baba
IPSJ Journal
42/ 4, 812-820
2001/04



53 Paper
Yes
Performance Evaluation of Adaptive Routers Based on the Number of Virtual Channels and Operating Frequencies

M. Horita, T. Yoshinaga, K. Ootsu, and T. Baba
IPSJ Journal
42/ 4, 714-723
2001/04



54 Paper
Yes
Design, Implementation and Evaluation of a Parallel Object-Oriented Language A-NETL

Takanobu Baba, Tsutomu Yoshinaga, Yoshiyuki Iwamoto, Kanemitsu Ootsu
Parallel and Distributed Computing Practices
3/ 2, 199-219
2000



55 Paper
Yes
Prediction Methodologies for Receiving Message Prediction
Joint
Y. Iwamoto, K. Ootsu, T. Yoshinaga, and T. Baba
IPSJ Journal
41/ 09, 2582-2591
2000/09



56 Paper
Yes
Recover-X Adaptive Routing

T. Yoshinaga, M. Hayashi, M. Horita, S. Nakamura, K. Ootsu, and T. Baba
Transactions of Information Processing Society of Japan
41/ 5, 1360-1369
2000/05



57 Paper
Yes
A Parallel Navigation Algorithm with Dynamic Load Balancing for OODBMSs

L. Mutenda, T. Baba, T. Yoshinaga and K. Ootsu
Trans. on IPSJ Database Systems
40/ SIG5(TOD2), 29-42
1999



58 Paper
Yes
Efficient Implementation Techniques and the Performance of a Parallel Object-Oriented Language A-NETL

T. baba, T. Yoshinaga, Y. Iwamoto, N. Saitou, S. Numprasertchai
IPSJ Journal
40/ 9, 3554-3563
1999



59 Paper
Yes
A-NET マルチコンピュータにおける仮想時間を用いた性能評価法とその実現

Y. Iwamoto, D. Abe, K. Ootsu, T. Yoshinaga, and T. Baba
IPSJ Journal
40/ 5, 1947-1957
1999



60 Paper
Yes
Prior-dimension Specification on output Channel Selection for Adaptive Routers

T. Yoshinaga, M. Hayashi, M. Horita, Y. Yamaguchi, K. Ootsu, and T. Baba
Transactions of Information Processing Society of Japan
40/ 5, 1958-1967
1999



61 Paper
No
Methodologies for High Performance Message Passing: Implementation and Evaluation

Y. Iwamoto, A. Sawada, D. Abe, Y. Sawada, K. Ootsu, T. Yoshinaga, and T. Baba
Trans. of IPSJ
39/ 6, 1663-1671
1998



62 Paper
Yes
System Performance Evaluation for the A-NET Multicomputer

T. Yoshinaga, A. Sawada, M. Hirota, D. Abe, Y. Iwamoto, and T. Baba
The Transactions of the Institute of Electronics, Information and Communication Engineers
J81-D-I/ 4, 368-376
1998



63 Paper
No
The Implementation of A-NETL on the Highly Parallel Computer AP1000

T. Yoshinaga, T. Baba, S. Numprasertchai
The Transactions of the Institute of Electronics, Information and Communication Engineers D-I
J80-D-I/ 9, 787-790
1997



64 Paper
Yes
The Node Processor for a Parallel Object-Oriented Total Architecture A-NET

T. Yoshinaga and T. Baba
THE TRANSACTIONS OF THE INSTITUTE OF ELECTRONICS,INFORMATION AND COMMUNICATION ENGINEERS D-I
J79-D-I/ 2, 60-68
1996



65 Paper
Yes
Event-Based Debugging for a Parallel Object-Oriented Language A-NETL

T. baba, Y. Furuya, and T. Yoshinaga
IEICE Trans. on Information and Systems
J79-D-I/ 6, 331-340
1996/06



66 Paper
No
A Declarative Synchronization Mechanism for Parallel Object-Oriented Computation

Takanobu Baba, Norihito Saitoh, Takahiro Furuta, Hiroshi Taguchi, Tsutomu Yoshinaga
IEICE Trans. on Information and Systems
E78-D/ 8, 969-981
1995



67 Paper
Yes
A Parallel Object-Oriented Language A-NETL Supporting the Topological Programming

T. Yoshinaga and T. Baba
The Transactions of the Institute of Electronics, Information and Communication Engineers
J77-D-I/ 8, 557-566
1994



68 Paper
Yes
Organization of a Network-Topology Independent Router for a Parallel Object-Oriented Total Architecture A-NET

T. Yoshinaga and T. Baba
Transactions of Information Processing Society of Japan
34/ 4, 648-657
1993/04



69 Paper
No
並列オブジェクト指向トータルアーキテクチャA-NETにおける
言語とアーキテクチャの統合

T. Baba and T. Yoshinaga
IEICE Trans. on Information and Systems
J75-D-I/ 8, 563-574
1992/08



70 Paper
Yes
A Local Operating System for the A-NET Parallel Object-Oriented Computer

Tsutomu Yoshinaga, Takanobu Baba
Journal of Information Processing
14/ 4, 414-422
1992/04



71 Paper
Yes
Design and Implementation of a Three-Dimensional Color Graphics System on a Parallel Computer MUNAP using Extended L6 Language

T. baba, M. Kagaya, T. Yoshinaga, S. Suzuki, K. Yamazaki, and K. Okuda
IEICE Trans. on Information and Systems
J73-D-I/ 1, 9-17
1990/01



72 International conference proceedings, etc.
Yes
A Peak-Avoidance Scheme for Chasing Playback of Mobile Live Streaming
Joint
Hiroki Okada; Masato Yoshimi; Celimuge Wu; Tsutomu Yoshinaga
Proc. of the 2020 Eighth International Symposium on Computing and Networking Workshops (CANDARW)
474-476
2021/02/22

10.1109/CANDARW51189.2020.00098

73 International conference proceedings, etc.
Yes
UAV-empowered Protocol for empowered Protocol for Information Sharing in VDTN
Joint
Zhaoyang Du, Celimuge Wu, and Tsutomu Yoshinaga
Proc. of The 16th International Conference on Mobility, Sensing and Networking (MSN 2020)
to appear-
2020/12



74 International conference proceedings, etc.
Yes
Traffic Big Data Assisted Broadcast in Vehicular Networks
Joint
Siri Guleng, Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
ACM RACS
5 pages-
2019/09



75 International conference proceedings, etc.
Yes
Traffic Flow Prediction with Compact Neural Networks

Yuhang Li, Celimuge Wu, Tsutomu Yoshinaga and Yusheng Ji
CBDCom
5 pages
2019/08



76 International conference proceedings, etc.
Yes
Performance Evaluation of RPL-Based Sensor Data Collection in Challenging IoT Environment
Joint
Liming Gao, Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
Proceedings of the 2nd International Conference on Healthcare Science and Engineering
275-285
2019/05

10.1007 /978-981-13-6837-0_20

77 International conference proceedings, etc.
Yes
A Color-Based Cooperative Caching Strategy for Time-Shifted Live Video Streaming

Hiroki Okada, Takayuki Shiroma, Celimuge Wu, Tsutomu Yoshinaga
Proc. of the 6th International Symposium on Computer Systems and Architectures (CSA'18)
6 pages
2018/11/29



78 International conference proceedings, etc.
Yes
The template-based sub-optimal content distribution for a D2D content sharing network

Takayuki Shiroma, Celimuge Wu, Tsutomu Yoshinaga
Proc. of the 6th International Symposium on Computing and Networking (CANDAR 2018)
6 pages
2018/11/28



79 International conference proceedings, etc.
Yes
A Prophet-based DTN protocol for VANETs
Joint
Zhaoyang Du, Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji
Proc. of The IEEE International Conference on Cloud and Big Data Computing (CBDCom 2018)
4 pages
2018/10/10



80 International conference proceedings, etc.
Yes
SDN-based Handover Approach in IEEE 802.11p and LTE hybrid vehicular networks
Joint
Ran Duo, Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
Proc. of The IEEE International Conference on Cloud and Big Data Computing (CBDCom 2018)
6 pages
2018/10/10



81 International conference proceedings, etc.
Yes
System Resource Management to Control the Risk of Data-Loss in Cloud-based Disaster Recovery

Yuichi Taguchi and Tsutomu Yoshinaga
Proc. of The 6th IEEE International Workshop on Architecture, Design, Deployment and Management of Networks and Applications (ADMNET)
210-215
2018/07/23
0730-3157
10.1109/COMPSAC.2018.10231

82 International conference proceedings, etc.
Yes
A learning-based probabilistic routing protocol for vehicular delay tolerant networks
Joint
Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji
Proceedings of 4th International Conference on Information and Communication Technologies for Disaster Management (ICT-DM2017)
1-6
2017/12/12

10.1109/ICT-DM.2017.8275695

83 International conference proceedings, etc.
Yes
Cooperative Content Delivery in Vehicular Networks with Integration of Sub-6 GHz and mmWave
Joint
Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
Proc. of the IEEE Global Communications Conference Workshops
6 pages-
2017/12/04



84 International conference proceedings, etc.
Yes
A Light-weight Cooperative Caching Strategy by D2D Content Sharing
Joint
Takayuki Shiroma, Takuma Nakajima, Celumuge Wu, and Tsutomu Yoshinaga
Proc. of the Fifth International Symposium on Computing and Networking (CANDAR 2017)
159-165
2017/11/20



85 International conference proceedings, etc.
Yes
V2R Communication Protocol Based on Game Theory Inspired Clustering
Joint
Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
Proc. of IEEE 86th Vehicular Technology Conference (VTC2017-Fall)
1-5
2017/09/24



86 International conference proceedings, etc.
Yes
DTN-based Vehicular Cloud for Post-disaster Information Sharing
Joint
Celimuge Wu, Tsutomu Yoshinaga, and Yusheng Ji
Proc. of the Wireless Days 2017
167-172
2017/03/29



87 International conference proceedings, etc.
Yes
A Light-weight Content Distribution Scheme for Cooperative Caching in Telco-CDNs

Takuma Nakajima, Masato Yoshimi, Celimuge Wu and Tsutomu Yoshinaga
Proc. of the Fourth International Symposium on Computing and Networking (CANDAR 2016)
126-132
2016/11/23

10.1109/CANDAR.2016.93

88 International conference proceedings, etc.
Yes
Accelerating BLAST Computation on an FPGA-enhanced PC Cluster

Masato Yoshimi, Yasin Oge, Celimuge Wu and Tsutomu Yoshinaga
Proc. of the Fourth International Symposium on Computing and Networking (CANDAR 2016)
67-76
2016/11/23

10.1109/CANDAR.2016.102

89 International conference proceedings, etc.
Yes
Context-aware Unified Routing for VANETs Based on Virtual Clustering
Joint
Celimuge Wu, Tsutomu Yoshinaga, and Yusheng J
Proc. of the 2nd International Workshop on Vehicular Networking and Intelligent Transportation systems (VENITS'16)
281-286
2016/09/04



90 International conference proceedings, etc.
Yes
Reinforcement Learning-based Data Storage Scheme in Vehicular Ad Hoc Networks
Joint
Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji, Tutomu Murase, Yan Zhang
Proc. of the IEEE International Conference on Communications (ICC) 2016
718-723
2016/05/24



91 International conference proceedings, etc.
Yes
An Efficient Cache Grouping Strategy for Multinode Cache Networks
Joint
Takayuki Shiroma, Takuma Nakajima, Kouta Nojima, Masato Yoshimi, and Tsutomu Yoshinaga
Proc. of the 8th International Workshop on Autonomous Self-Organizing Networks (ASON'15)
295-298
2015/12/08



92 International conference proceedings, etc.
Yes
Accelerating OLAP workload on interconnected FPGAs with Flash storage
Joint
Masato Yoshimi, Ryu Kudo, Yasin Oge, Yuta Terada, Hidetsugu Irie, and Tsutomu Yoshinaga
Proc. of the 2nd International Workshop on Computer Systems and Architectures (CSA'14)
440-446
2014/12/11



93 International conference proceedings, etc.
Yes
An FPGA-based Tightly Coupled Accelerator for Data-Intensive Applications
Joint
Masato Yoshimi, Ryu Kudo, Yasin Oge, Yuta Terada, Hidetsugu Irie, Tsutomu Yoshinaga
Proc. of the 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC)
289-296
2014/09/24


URL
94 International conference proceedings, etc.
Yes
An Efficient and Scalable Implementation of Sliding-Window Aggregate Operator on FPGA
Joint
Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, and Tsutomu Yoshinaga
Proc. of the First International Symposium on Computing and Networking (CANDAR 2013)
112-121
2013/12



95 International conference proceedings, etc.
Yes
Sharing Computing Resources with Virtual Machines by Transparent Data Access

Takuma Nakajima, Masato Yoshimi, Hidetsugu Irie, and Tsutomu Yoshinaga
Proc. of the 1st International Workshop on Computer Systems and Architectures (CSA)
359-365
2013/12



96 International conference proceedings, etc.
Yes
Wire-Speed Implementation of Sliding-Window Aggregate Operator over Out-of-Order Data Streams
Joint
Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, and Tsutomu Yoshinaga
Proc. of 7th IEEE Int. Sympo. on Embedded Multicore SoCs (MCSoC-13)
55-60
2013/09



97 International conference proceedings, etc.
Yes
A fast handshake join implementation on FPGA with adaptive merging network

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga
25th International Conference on Scientific and Statistical Database Management (SSDBM 2013)
No.44 (4 pages)-
2013/07



98 International conference proceedings, etc.
Yes
Variable Color Environment System using Heart Rate Variability

Naoko Kanda, Daiki Sakuma, Masato Yoshimi, Tsutomu Yoshinaga,
and Hidetugu Irie
Proc. of the 2013 International Conference on Bioinformatics & Computational Biology (BIOCOMP'13)
1-BIOCOMP-6-
2013/07



99 International conference proceedings, etc.
Yes
A Real Time Gait Improvement Tool Using a Smartphone

Hirotaka Kashihara, Hiroki Shimizu, Hiroyoshi Houchi, Masato Yoshimi, Tsutomu Yoshinaga and Hidetsugu Irie
Proceedings of the 4th Augmented Human International Conference (AH13)
243-
2013/03



100 International conference proceedings, etc.
Yes
STRAIGHT: Realizing a Lightweight Large Instruction Window by using Eventually Consistent Distributed Registers

Hidetsugu Irie, Daisuke Fujiwara, Kazuki Majima and Tsutomu Yoshinaga
Proc. of the International Workshop on Challenges on Massively Parallel Processors (CMPP)
336-342
2012/12



101 International conference proceedings, etc.
Yes
Parallel Numerical Simulation of Visual Neurons for Analysis of Optical Illusion

Akira Egashira, Shunji Satoh, Hidetsugu Irie and Tsutomu Yoshinaga
Proc. of the 3rd International Conference on Networking and Computing (ICNC 2012)
130-136
2012/12



102 International conference proceedings, etc.
Yes
Design and Implementation of a Merging Network Architecture for Handshake Join Operator on FPGA

Oge Yasin, Takefumi MIYOSHI, Hideyuki Kawashimay, Tsutomu Yoshinaga
Proc. of 6th IEEE Int. Sympo. on Embedded Multicore SoCs (MCSoC-12)
84-91
2012/09



103 International conference proceedings, etc.
Yes
Throttling Control for Bufferless Routing in On-Chip Networks

Yicheng Guan, CISSE AHMADOU DIT ADI, Takefumi Miyoshi, Michihiro Koibuchi, Hidetsugu Irie and Tsutomu Yoshinaga
Proc. of 6th IEEE Int. Sympo. on Embedded Multicore SoCs (MCSoC-12)
37-44
2012/09



104 International conference proceedings, etc.
No
A Token-based Fully Photonic Network-on-Chip with Dynamic Wavelength Allocation

P. Qiu, C.A.D. Adi, H. Irie, T. Yoshinaga
Proc. of the International Workshop on Modern Science and Technology (IWMST 2012)
39-44
2012/08



105 International conference proceedings, etc.
Yes
FLAT: A GPU Programming Framework to Provide Embedded MPI

T. Miyoshi, K. Shima, M. Kondo, H. Irie, H. Honda, and T. Yoshinaga
Proc. of the 5th Workshop on General Purpose Processing on Graphics Processing Units (GPGPU-5)
10 pages-
2012/03



106 International conference proceedings, etc.
Yes
CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection

Hidetsugu IRIE, Takefumi MIYOSHI, Goki HONJO, Kei HIRAKI, Tsutomu YOSHINAGA
Proc. of the 2nd Int. Conf. on Networking and Computing (ICNC'11)
127-133
2011/11



107 International conference proceedings, etc.
Yes
An implementation of Handshake Join on FPGA

Oge Yasin, Takefumi MIYOSHI, Hideyuki Kawashimay, Tsutomu Yoshinaga
Proc. of the 2nd Int. Conf. on Networking and Computing (ICNC'11)
95-104
2011/11



108 International conference proceedings, etc.
Yes
Multi-GPU Acceleration of Optical Flow Computation in Visual Functional Simulation

Junichi Ohmura, Akira Egashira, Shunji Satoh, Takefumi Miyoshi, Hidetsugu Irie and Tsutomu Yoshinaga
Proc. of the 3rd International Workshop on Parallel and Distributed Algorithms and Applications (PDAA)
228-234
2011/11



109 International conference proceedings, etc.
Yes
A Coarse Grain Reconfigurable Processor Architecture for
Stream Processing Engine

Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga
Proc. of 21st International Conference on Field Programmable Logic and Applications
490-495
2011/09



110 International conference proceedings, etc.
Yes
Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster

Qin Wang, Junichi Ohmura, Shan Axida, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga
Proc. of the 2nd International Workshop on Parallel and Distributed Algorithms and Applications (PDAA)
243-248
2010/11



111 International conference proceedings, etc.
No
An Efficient Path Setup for a Hybrid Photonic Network-on-Chip

Cisse Ahmadou Dit ADI, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi and Tsutomu Yoshinaga
Proc. of the 2nd Workshop on Ultra Performance and Dependable Acceleration Systems (UPDAS'10)
156-161
2010/11



112 International conference proceedings, etc.
No
CODIE: Continuation-based Overlapping Data-transfers with Instruction Execution

Takefumi Miyoshi, Kenji Kise, Hidetsugu Irie, Tsutomu Yoshinaga
Proc. of the First Int. Conf. on Networking and Computing (ICNC'10)
71-77
2010/11



113 International conference proceedings, etc.
Yes
OREX: An Optical Ring with Electrical Crossbar Hybrid Photonic Network-on-Chip

Cisse Ahmadou Dit ADI, Ping Qiu, Takefumi Miyoshi, and Tsutomu YOSHINAGA
Proc. International Workshop on Innovative Architecture for
Future Generation High-Performance Processors and Systems 2010
3-10
2010/03



114 International conference proceedings, etc.
Yes
Prediction Router: Yet Another Low Latency On-Chip Router
Architecture

Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga
Proc. of 15th International Symposium on High-Performance
Computer Architecture (HPCA-15)
367-379
2009/02



115 International conference proceedings, etc.
Yes
Mathematical Model for Multiobjective Synthesis of NoC Architectures

B.A. Ben, M. Akanda, T. Yoshinaga and M. Sowa
Proc. of International Workshop on Embedded Single and Multicore Systems on Chips (MCSoC-07)
CD
2007/09



116 International conference proceedings, etc.
Yes
Impact of Predictive Switching in 2-D Torus Networks

Tsutomu YOSHINAGA, Hirokazu MURAKAMI, Michihiro KOIBUCHI
Proc. of the 10th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
11-19
2007/01



117 International conference proceedings, etc.
Yes
Scalable Core-Based Methodology and Synthesizable Core for Systematic Design Environment in Multicore SoC

Ben A. Abderazek, Tsutomu Yoshinaga, and Masahiro Sowa
Proc. of the 2006 International Conference on Parallel Processing Workshop
345-352
2006/08



118 International conference proceedings, etc.
No
A partial Irregular-Network Routing on Faulty k-ary n-cubes

M. Koibuchi, T. Yoshinaga and Y. Nishimura
Proc. of the 9th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA06)
57-64
2006/01



119 International conference proceedings, etc.
No
Predictive Switching in 2-D Torus Routers

T. Yoshinaga, S. Kamakura, M. Koibuchi
Proc. of the 9th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
65-71
2006/01



120 International conference proceedings, etc.
Yes
Modular design structure and high-level prototyping for novel embedded processor core

Ben A. Abderazek, Sotaro Kawata, Tsutomu Yoshinaga, Masahiro Sowa
Proc. of the 2005 IFIP int. conf. on embedded and ubiquitous Computing (EUC-05)
340-349
2005/12



121 International conference proceedings, etc.
Yes
Asynchronous Parallel Programming Model for SMP Clusters

Ta Quoc Viet, Tsutomu Yoshinaga
Proc. of the IASTED Int. Conf. on Parallel and Distributed Computing Systems (PDCS 2005)
466-070, 6 pages in CD
2005/11



122 International conference proceedings, etc.
No
Performance Evaluation of Dynamic Network Reconfiguration using Detour-UD Routing

Tsutomu Yoshinaga, and Yasuhiko Nishimura
Proc. 8th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'05), IEEE CS
110-118
2005/01



123 International conference proceedings, etc.
No
Design of Producer-Order Parallel Queue Processor Architecture

A. Markovskij, B.A. Abderazek, S. Shigeta, T. Yoshinaga, M. Sowa
Proceedings on International Workshop on Modern Science and Technology
25-28
2004/09



124 International conference proceedings, etc.
No
High Performance Hybrid Processor Architecture
with Efficient Hardware Usability

Akanda Md. Musfiquzzaman, Ben A. Abderazek, Soichi Shigeta, Tsutomu
Yoshinaga, Masahiro Sowa
Proceedings on International Workshop on
Modern Science and Technology
43-46
2004/09



125 International conference proceedings, etc.
No
Theoretical Evaluation of Simultaneous Multithreading Parallel Queue Processor Architecture

Hirotoshi Sasaki,Yoshitomo Okumura,Ben Abderazek,Soichi Shigeta,Tsutomu Yoshinaga,Masahiro Sowa
International Conference on Circuits/Systems, Computers and Communications
6D1L-2-1~4-
2004/07



126 International conference proceedings, etc.
No
QJava: Integrate Queue Computational Model into Java

S. Shigeta, L.-Q. Wang, N. Yagishita, B. A. Abderazek, T. Yoshinaga, and M. Sowa
Proc. of the Joint Japan-Tunisia Workshop on Computer Systems and Information Technology (JT-CSIT'04)
60-65
2004/07



127 International conference proceedings, etc.
Yes
Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme

B. A. Abderazek, M. Arsenji, S. Shigeta, T. Yoshinaga, and M. Sowa
Proc. of the International Conference on High Performance Computing and Grid in Asia Pacific Region
169-177
2004/07



128 International conference proceedings, etc.
No
Optimization for Hybrid MPI-OpenMP Programs on a Cluster of SMP PCs

Tsutomu Yoshinaga, Ta Quoc Viet
Proc. of the Joint Japan-Tunisia Workshop on Computer Systems and Information Technology (JT-CSIT'04)
28-35
2004/07



129 International conference proceedings, etc.
Yes
Fault-Tolerant Adaptive Deadlock-Recovery Routing
for k-ary n-cube Networks

Tsutomu Yoshinaga, Hiroyuki Hosogoshi, Masahiro Sowa
Proc. 7th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IEEE CS
49-58
2004/01



130 International conference proceedings, etc.
Yes
QJAVAC: Queue-Java Compiler Design for High Parallelism Queue Java Bytecode

Li. Qiang Wang, Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa
International Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2003)
900-903
2003/07



131 International conference proceedings, etc.
Yes
On the Design of a Register Queue Based Processor Architecture (FaRM-rq)

Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa
Proc. International Symposium on Parallel and Distributed Processing and Applications (ISPA03), Lecture Note in Computer Science 2745
248-262
2003/07



132 International conference proceedings, etc.
No
Architectural Issues in the Design of a High Performance Parallel Queue Processor

Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa
4th Bilateral Symposium on Science & Technology

2003/04



133 International conference proceedings, etc.
No
Design and Evaluation of a Fault-Tolerant Adaptive Router for Parallel Computers

Tsutomu Yoshinaga, Hiroyuki Hosogoshi, Masahiro Sowa
Proc. 6th Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IEEE CS
100-107
2003/01



134 International conference proceedings, etc.
Yes
Proposal and Design of a Parallel Queue Processor Architecture (PQP)

M. Sowa, B. A. Abderazek, S. Shigeta, K. Nikolova, and T. Yoshinaga
Proc. 14th IASTED International Conference on Parallel and Distributed Computing and Systems
554-560
2002/10



135 International conference proceedings, etc.
No
High parallelism Java Compiler with Queue Architecture

Li-Qiang Wang, Tsutomu Yoshinaga, Masahiro Sowa
International Workshop on Modern
Science and Technology (IWMST02)
130-135
2002/09



136 International conference proceedings, etc.
No
Complexity Analysis of a Functional Assignment Register Microprocessor

Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa
International Workshop on Modern
Science and Technology (IWMST2002)
116-123
2002/09



137 International conference proceedings, etc.
Yes
Real-time Medical Diagnosis on a Multiple FPGA-based System

Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba
12th International Conference on Field Programmable Logic and Applications (FPL2002)
1088-1091
2002/09



138 International conference proceedings, etc.
No
A Scalable FPGA-based Custom Computing Machine for a Medical Image Processing

Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, and Takanobu Baba
Proc. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM02)
307-308
2002/04



139 International conference proceedings, etc.
Yes
Design and Evaluation of Speculative Multithreading with Selective Multi-Path Execution

Kanemitsu Ootsu, Tsutomu Yoshinaga, Takanobu Baba
Proc. of Workshop on Advances in Parallel and Distributed Computational Models
139-
2001



140 International conference proceedings, etc.
No
Efficient Implementation of a Parallel Object-Oriented Language A-NETL on Multicomputers

Takanobu Baba, Tsutomu Yoshinaga, Yoshiyuki Iwamoto, Somchai Numprasertchai,
Norihito Saitoh, Kanemitsu Ootsu, Mitsutoshi Hori
Proc. France-Japan Workshop on Object-Based Parallel
and Distributed Computation, Object-Oriented Parallel and Distributed Programming
75-93
2000



141 International conference proceedings, etc.
Yes
Performance Evaluation of the Recover-X Adaptive Router for 2D Torus Networks

T. Yoshinaga, M. Hayashi, M. Horita, S. Nakamura, K. Ootsu, and T. Baba
Proceedings of the World Multiconference on Systemics, Cybernetics and Informatics 2000
107-112
2000/08



142 International conference proceedings, etc.
Yes
RecoverX : An Adaptive Router with Limited Escape Channels

T. Yoshinaga, M. Hayashi, M. Horita, S. Nakamura, K. Ootsu, and T. Baba
Proceedings of the Seventh International Conference on Parallel and Distributed Systems
272-279
2000/08



143 International conference proceedings, etc.
Yes
Message Prediction and Speculative Execution of the Reception Process

Y. Iwamoto, K. Ootsu, T. Yoshinaga, and T. Baba
Proc. IASTED International Conference on Parallel and Distributed Computing and Systems '99
329-334
1999



144 International conference proceedings, etc.
Yes
A Speculative Multithreading with Selective Multipath

K. Ootsu, W. Yoshinari, F. Furukawa, T. Yoshinaga and T. Baba
Proc. International Workshop on Innovative Architecture for Future Generation Parallel Processing and Systems
46-52
1999



145 International conference proceedings, etc.
Yes
A Cost and Performance Comparison for Wormhole Routers based on HDL Designs

T. Yoshinaga, M. Hayashi, M. Horita, Y. Yamaguchi, K. Ootsu, and T. Baba
Proceedings of the 1998 International Conference on Parallel and Distributed Systems
375-382
1998



146 International conference proceedings, etc.
Yes
Parallel Navigation in an A-NETL Bassed Parallel OODBMS

Lawrence Mutenda, Manabu Hiyama, Tsutomu Yoshinaga, Takanobu Baba
Proc. International Symposium on High Performance Computing, Lecture Notes in Computer Science
305-316
1997



147 International conference proceedings, etc.
No
The A-NET Working Prototype: A Parallel Object-Oriented
Multicomputer with Reconfigurable Network

Takanobu Baba, Tsutomu Yoshinaga, Yoshiyuki Iwamoto, Daiki Abe
Proc. International Workshop on Innovative Architecture for Future Generation Parallel Processing and Systems, IEEE CS
40-49
1997



148 International conference proceedings, etc.
No
Programming and Debugging for Massive Parallelism: The Case for a Parallel Object-Oriented Language A-NETL

Takanobu Baba, Tsutomu Yoshinaga, Takahiro Furuta
Proc. Workshop on Object-Based Parallel and Distributed Computation, Springer, Lecture Notes in Computer Science 1107
38-58
1995



149 International conference proceedings, etc.
Yes
A-NETL: A Language for Massively Parallel Object-Oriented
Computing

Takanobu Baba, Tsutomu Yoshinaga
Proc. Massively Parallel Programming Models
98-105
1995



150 International conference proceedings, etc.
Yes
A Parallel Object-Oriented Language A-NETL and Its Programming Environment

Tsutomu Yoshinaga, Takanobu Baba
The Fifteenth Annual International Computer Software & Applications Conference
459-464
1991



151 International conference proceedings, etc.
Yes
A Network-Topology Independent Task Allocation Strategy for Parallel Computers

Takanobu Baba, Yoshifumi Iwamoto, Tsutomu Yoshinaga
Proc. Supercomputing '90
878-887
1990



152 International conference proceedings, etc.
Yes
A Parallel Object-Oriented Total Architecture: A-NET

Takanobu Baba, Tsutomu Yoshinaga, Tohru Iijima, Yoshifumi Iwamoto
Proc. Supercomputing '90
276-285
1990



153 Tutorial
Yes
Federated Learning for Vehicular Internet of Things: Recent Advances and Open Issues
Joint
Zhaoyang Du ; Celimuge Wu ; Tsutomu Yoshinaga ; Kok-Lim Alvin Yau ; Yusheng Ji ; Jie Li
IEEE Open Journal of the Computer Society
Early Access, 0-
2020/05/06
2644-1268
10.1109/OJCS.2020.2992630

154 Essay
No
活動60年を超えたコンピュータシステム研究会
Only
吉永努
電子情報通信学会情報・システムソサイエティ誌
19/ 1, 10-11
2014/05/01