Published papers
Number of published data : 58
No. Classification Refereed paper Title Authorship Author Journal Volume/issue/page Publication date ISSN DOI URL
1 Paper
Yes
Footprint-Based DIMM Hotplug
Joint
S. Miwa, M. Ishihara, H. Yamaki, H. Honda, and M. Schulz
IEEE Transactions on Computers
69/ 2, 172-184
2020



2 Paper
Yes
A Runtime Optimization Selection Framework to Realize Energy Efficient Network-on-Chip
Joint
Y. He, M. Kondo, T. Nakada, H. Sasaki, S. Miwa, and H. Nakamura
IEICE Transactions on Information and Systems
E99-D/ 5, 1-10
2016



3 Paper
Yes
Design Aid of Multi-core Embedded Systems with Energy Model
Joint
T. Nakada, K. Okamoto, T. Komoda, S. Miwa, Y. Sato, H. Ueki, M. Hayashikoshi, T. Shimizu, H. Nakamura
IPSJ Transactions on Advanced Computing Systems
7/ 3, 37-46
2014



4 Paper
Yes
Analysis of Performance Requirement of STT-MRAM Last Level Caches Considering Low CPU Load
Joint
Eishi Arima, Toshiya Komoda, Takashi Nakada, Shinobu Miwa, Hiroki Noguchi, Kumiko Nomura, Keiko Abe, Shinobu Fujita, Hiroshi Nakamura
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
J97-A/ 10, 629-647
2014



5 Paper
Yes
Area-Efficient Microarchitecture of Reinforcement of Turbo Mode
Joint
Shinobu Miwa, Takara Inoue, Hiroshi Nakamura
IEICE Transactions on Information and Systems
E97-D/ 5, 1196-1210
2014



6 Paper
Yes
Evaluation of Core Hopping on POWER7
Joint
Shinobu Miwa, Charles R. Lefurgy
ACM SIGMETRICS Performance Evaluation Review
special issue/ greenmetrics 2014, 11-16
2014



7 Paper
Yes
Power/performance Evaluation of EEE on real HPC environment
Joint
Shinobu Miwa, Sho Aita, Yuichiro Ajima, Toshiyuki Shimizu, Akira Asato, Hiroshi Nakamura
IPSJ Transactions on Advanced Computing Systems
7/ 4, 67-83
2014



8 Paper
Yes
Lost Data Prefetch for Reduction of Performance Penalty Caused by Cache Power-off
Joint
Eishi Arima, Toshiya Komoda, Takashi Nakada, Shinobu Miwa, Hiroshi Nakamura
IPSJ Transactions on Advanced Computing Systems
6/ 3, 118-130
2013



9 Paper
Yes
Evaluation of a New Power-Gating Scheme Utilizing Data Retentiveness on Caches
Joint
K. Kim, S. Takeda, S. Miwa, H. Nakamura
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E95-A/ 12, 2301-2308
2012



10 Paper
Yes
A Fine-Grained Runtime Power/Performance Optimization Method for Processors with Adaptive Pipeline Depth
Joint
J. Yao, S. Miwa, H. Shimada, S. Tomit
Journal of Computer Science and Technology
26/ 2, 292-301
2011



11 Paper
Yes
Hardware Acceleration for Java in Android Devices
Joint
Atsushi Ohta, Shinobu Miwa, Hironori Nakajo
IPSJ Transactions on Advanced Computing Systems
42/ 3, 115-132
2011



12 Paper
Yes
Evaluation of GPU-based Empirical Mode Decomposition for Off-line Analysis
Joint
P. Waskito, S. Miwa, Y. Mitsukura, H. Nakajo
IEICE Transactions on Information and Systems
E94-D/ 12, 2328-2337
2011



13 Paper
Yes
Area-efficient Register Map Table Using a Cache
Joint
Shinobu Miwa, Peng Zhang, Hiroki Yokoyama, Yuhei Horibe, Hironori Nakajo
IPSJ Transactions on Advanced Computing Systems
3/ 3, 44-55
2010



14 Paper
Yes
An Instruction Scheduler for Dynamic ALU Cascading Adoption
Joint
J. Yao, K. Ogata, H. Shimada, S. Miwa, H. Nakashima, S. Tomita
IPSJ Transactions on Advanced Computing Systems
2/ 2, 30-47
2009



15 Paper
Yes
Dynamic Switch of L1/L2 Cache Accesses on SMT Processors
Joint
Y. Ogasawara, S. Miwa, H. Nakajo
IPSJ Transactions on Advanced Computing Systems
2/ 3, 12-25
2009



16 Paper
Yes
A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases
Joint
J. Yao, S. Miwa, H. Shimada, S. Tomita
IEICE Transactions on Information and Systems
E91-D/ 4, 1010-1022
2008



17 Paper
Yes
Low Complexity of Operand Bypasses Using Small RAM
Joint
Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Shinji Tomita
IPSJ Transactions on Advanced Computing Systems
48/ SIG13, 58-69
2007



18 Paper
Yes
Branch Filtering Mechanism with Path Information
Joint
Shinobu Miwa, Tomohisa Fukuyama, Hajime Shimada, Masahiro Goshima, Yasuhiko Nakashima, Shinichiro Mori, Shinji Tomita
IPSJ Transactions on Advanced Computing Systems
47/ SIG12, 108-118
2006



19 Invited paper
Yes
Low-power cache memory with state-of-the-art STT-MRAM for high-performance processors
Joint
S. Takeda, H. Noguchi, K. Nomura, S. Fujita, S. Miwa, E. Arima, T. Nakada, and H. Nakamura
The 12th International SoC Design Conference
153-154
2015



20 Invited paper
Yes
Normally-Off Computing Project : Challenges and Opportunities
Joint
H. Nakamura,T. Nakada,S. Miwa
The 19th Asia and South Pacific Design Automation Conference
special session 1S/ 1, 1-5
2014



21 International conference proceedings, etc.
Yes
Evaluating the Impact of Energy Efficient Networks on HPC Workloads
Joint
G. Georgakoudis, N. Jain, T. Ono, K. Inoue, S. Miwa, and A. Bhatele
26th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC)
1-10
2019



22 International conference proceedings, etc.
Yes
Functionally-Predefined Kernel: a Way to Reduce CNN Computation
Joint
Y. Inouchi, H. Yamaki, S. Miwa, and T. Tsumura
The 2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PacRim 2019)
1-6
2019



23 International conference proceedings, etc.
Yes
Multi-Level Packet Processing Caches
Joint
K. Tanaka, H. Yamaki, S. Miwa, and H. Honda
The 2019 IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 22)
1-3
2019



24 International conference proceedings, etc.
Yes
Optimizing Memory Hierarchy within an Internet Router for High-Throughput and Energy-Efficient Packet Processing
Joint
K. Tanaka, H. Yamaki, S. Miwa, and H. Honda
ACM Student Research Competition (in conjunction with the 51st Annual ACM/IEEE International Symposium on Microarchitecture) (poster presentation)
poster
2018



25 International conference proceedings, etc.
Yes
Data Prediction for Response Flows in Packet Processing Cache
Joint
H. Yamaki, H. Nishi, S. Miwa, and H. Honda
2018 55th ACM/EDAC/IEEE Design Automation Conference
110
2018



26 International conference proceedings, etc.
Yes
Run-Time DFS/DCT Optimization for Power-Constrained HPC Systems
Joint
I. Miyoshi, S. Miwa, K. Inoue, and M. Kondo
The International Conference on High Performance Computing in Asia-Pacific Region
poster
2018



27 International conference proceedings, etc.
Yes
Evaluation of Task Mapping on Multicore Neural Network Accelerators
Joint
S. Shindo, M. Ohba, T. Tsumura, and S. Miwa
The 4th International Workshop on Computer Systems and Architectures
415-421
2016



28 International conference proceedings, etc.
Yes
Initial Study of Reconfigurable Neural Network Accelerators
Joint
M. Ohba, S. Miwa, S. Shindo, T. Tsumura, H. Yamaki, and H. Honda
The 7th International Workshop on Advances in Networking and Computing
poster, 707-709
2016



29 International conference proceedings, etc.
Yes
Profile-Based Power Shifting in Interconnection Networks with On/Off Links
Joint
S. Miwa, and H. Nakamura
The International Conference for High Performance Computing, Networking, Storage and Analysis
37:1-37:11
2015



30 International conference proceedings, etc.
Yes
Memory Hotplug for Energy Savings of HPC systems
Joint
S. Miwa, and H. Honda
The International Conference for High Performance Computing, Networking, Storage and Analysis
poster
2015



31 International conference proceedings, etc.
Yes
Immediate Sleep: Reducing Energy Impact of Peripheral Circuits in STT-MRAM Caches
Joint
E. Arima, H. Noguchi, T. Nakada, S. Miwa, S. Takeda, S. Fujita, and H. Nakamura
The 33rd IEEE International Conference on Computer Design
157-164
2015



32 International conference proceedings, etc.
Yes
Runtime Multi-Optimizations for Energy Efficient On-chip Interconnections
Joint
Y. He, M. Kondo, T. Nakada, H. Sasaki, S. Miwa, and H. Nakamura
The 33rd IEEE International Conference on Computer Design
484-487
2015



33 International conference proceedings, etc.
Yes
Subarray Level Power-Gating in STT-MRAM Caches to Mitigate Energy Impact of Peripheral Circuits
Joint
E. Arima, S. Miwa, T. Nakada, S. Takeda, H. Noguchi, S. Fujita, and H. Nakamura
2015 52nd ACM/EDAC/IEEE Design Automation Conference
poster
2015



34 International conference proceedings, etc.
Yes
Fine-Grain Power-Gating on STT-MRAM Peripheral Circuits with Locality-aware Access Control
Joint
E. Arima, T. Nakada, S. Miwa, S. Takeda, H. Noguchi, S. Fujita, and H. Nakamura
The Memory Forum
1-5
2014



35 International conference proceedings, etc.
Yes
Data-aware Power Management for Periodic Real-time Systems with Non-Volatile Memory
Joint
T. Nakada, T. Shigematsu, T. Komoda, S. Miwa, Y. Sato, H. Ueki, M. Hayashikoshi, T. Shimizu, and H. Nakamura
The 3rd IEEE Nonvolatile Memory Systems and Applications Symposium
1-6
2014



36 International conference proceedings, etc.
Yes
Predict-more Router: A Low Latency NoC Router with More Route Predictions
Joint
Y. He, H. Sasaki, S. Miwa, and H. Nakamura
The 3rd Workshop on Communication Architecture for Scalable Systems
842-850
2013



37 International conference proceedings, etc.
Yes
D-MRAM Cache: Enhancing Energy Efficiency with 3T-1MTJ DRAM/MRAM Hybrid Memory
Joint
H. Noguchi, K. Nomura, K. Abe, S. Fujita, E. Arima, K. Kim, T. Nakada, S. Miwa, and H. Nakamura
Design, Automation & Test in Europe
1813-1818
2013



38 International conference proceedings, etc.
Yes
McRouter: Multicast within a Router for High Performance Network-on-Chips
Joint
Y. He, H. Sasaki, S. Miwa, and H. Nakamura
The 22nd International Conference on Parallel Architectures and Compilation Techniques
319-329
2013



39 International conference proceedings, etc.
Yes
Performance Modeling for Designing NoC-based Multiprocessors
Joint
T. Nakada, S. Miwa, K. Yano, and H. Nakamura
IEEE International Symposium on Rapid System Prototyping
30-36
2013



40 International conference proceedings, etc.
Yes
Integrating Multi-GPU Execution in an OpenACC Compiler
Joint
T. Komoda, N. Maruyama, S. Miwa, and H. Nakamura
The 42nd International Conference on Parallel Processing
260-269
2013



41 International conference proceedings, etc.
Yes
Performance Estimation of High Performance Computing Systems with Energy Efficient Ethernet Technology
Joint
Shinobu Miwa, Sho Aita, Hiroshi Nakamura
International Conference on Energy-Aware High Performance Computing
1-8
2013



42 International conference proceedings, etc.
Yes
Communication Library to Overlap Computation and Communication for OpenCL Application
Joint
T. Komoda, S. Miwa, and H. Nakamura
The 17th International Workshop on High-Level Parallel Programming Models and Supportive Environment
560-566
2012



43 International conference proceedings, etc.
Yes
A Novel Power-Gating Scheme Utilizing Data Retentiveness on Caches

K. Kim, S. Takeda, S. Miwa, and H. Nakamura
2012 Great Lakes Symposium on VLSI
91-94
2012



44 International conference proceedings, etc.
Yes
Efficient Leakage Power Saving by Sleep Depth Controlling for Multi-mode Power Gating
Joint
S. Takeda, S. Miwa, K. Usami, and H. Nakamura
The 13th International Symposium on Quality Electronic Design
627-634
2012



45 International conference proceedings, etc.
Yes
Stepwise Sleep Depth Control for Run-Time Leakage Power Saving
Joint
S. Takeda, S. Miwa, K. Usami, and H. Nakamura
2012 Great Lakes Symposium on VLSI
233-238
2012



46 International conference proceedings, etc.
Yes
Extraction of horns in a noisy environment by EMD

M. Nakanishi, Y. Mitsukura, T. Tanaka, S. Miwa, and H. Nakajo
International Workshop on Nonlinear Circuits and Signal Processing
333-336
2010



47 International conference proceedings, etc.
Yes
Parallelizing Hilbert-Huang Transform on GPU
Joint
P. Waskito, S. Miwa, Y. Mitsukura, and H. Nakajo
The 2nd Workshop on Ultra Performance and Dependable Acceleration Systems
184-190
2010



48 International conference proceedings, etc.
Yes
An Effective Replacement Policy Focusing on Lifetime of a Cache Line
Joint
H. Yokoyama, Y. Horibe, P. Zhang, S. Miwa, and H. Nakajo
International Conference on Computer Design
146-152
2010



49 International conference proceedings, etc.
Yes
Improving Effectiveness of Pipeline Stage Unification via ALU Cascading
Joint
J. Yao, H. Shimada, K. Ogata, S. Miwa, and S. Tomita
12th IEEE Symposium on Low-Power and High-Speed Chips
423-436
2009



50 International conference proceedings, etc.
Yes
Dynamic Switching Techniques of Accessing L1/L2 Cache on an SMT Processor
Joint
Y. Ogasawara, P. Waskito, S. Miwa, and H. Nakajo
International Conference on Computer Design
171-177
2009



51 International conference proceedings, etc.
Yes
Low-Complexity Bypass Network Using Small RAM
Joint
Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita
International Conference on Computer Design
153-159
2008



52 International conference proceedings, etc.
Yes
Optimal Pipeline Depth with Pipeline Stage Unification Adoption
Joint
J.Yao, H. Shimada, S. Miwa, and S. Tomita
International Workshop on Advanced Low Power Systems
3-9
2007



53 International conference proceedings, etc.
Yes
Three Quads : An Interconnection Network for Interactive Simulations
Joint
T. Yoshimura, K. Saito, H. Shimada, S. Miwa, Y. Nakashima, S. Mori, and S. Tomita
Asian Simulation Conference 2006
362-366
2006



54 International conference proceedings, etc.
Yes
An FPGA-based Visualization Accelerator : VisA Pro
Joint
Symposium on VLSI (GLSVLSI'12) (poster presentation), pp.91-94 (May 2012).
S. Mori, D. Okamura, H. Shimada, S. Miwa, Y. Nakashima, and S. Tomita
International Symposium on Advanced Reconfigurable Systems
poster
2005



55 Tutorial
No
Organization Report for SWoPP Beppu 2015
Joint
H. Yamada, T. Ohkawa, Y. Katsu, S. Miwa, T. Endo, H. Tadano, Y. Takamiya, M. Kubota, M. Koibuchi, M. Goshima
IPSJ Magazine
56/ 12, 1220-1223
2015



56 Tutorial
No
Organization Report for SWoPP Niigata 2014
Joint
K. Nakajima, Y. Katsu, S. Miwa, R. Takano, T. Iwashita, T. Yoshikawa, H. Tadano, H. Matsutani
IPSJ Magazine
55/ 12, 1415-1418
2014



57 Tutorial
No
Normally-off Computing - its opportunities and challenges -
Joint
Hiroshi Nakamura, Takashi Nakada, Shinobu Miwa
IPSJ Magazine
54/ 7, 654-660
2013



58 Tutorial
No
From the Editor
Only
Shinobu Miwa
IPSJ Magazine
54/ 7, 652-653
2013