日本語
The University of Electro-Communications 
Graduate School of Informatics and Engineering, School of Informatics and Engineering 
Department of Informatics, Cluster II (Emerging Multi-interdisciplinary Engineering) 

Associate Professor 
Takeshi SUGAWARA 

Career
Mitsubishi Electric Corporation  2011/04/01-2017/02/28 

Academic background
Tohoku University  Engineering  Information Engineering  2006/03/25  Graduated 
Tohoku University  Graduate School of Information Sciences  Computer and Mathematical Sciences  Master's program  2008/03/25  Completed 
Tohoku University  Graduate School of Information Sciences  Computer and Mathematical Sciences  Doctoral program  2011/03/25  Completed 

Academic degrees
Master of Information Science  Graduate School of Information Sciences at Tohoku University  2008/03/25 
Ph.D.  Graduate School of Information Sciences at Tohoku University  2011/03/25 

Classes responsible within the university
2017  Operating System  Spring semester  Undergraduate, daytime 
2017  Cryptography and Information Security  Spring semester  Undergraduate, mainly nighttime 
2017  Introduction to Informatics  Spring semester  Undergraduate, daytime  Subject in specialty 
2017  Physics Laboratory  Fall semester  Undergraduate, daytime 
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Current research areas
Information security 

Research keywords
Hardware Security 
Embedded Systems Security 
IoT Security 
Implementation of Cryptography 

Published papers
Paper  Yes  Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack  Joint  T. Sugawara, D. Suzuki, and M. Saeki  IEICE Trans. Fundamentals  E99-A/ 7, 1323-1333  2017/07 
Paper  Yes  Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication  Joint  K. Shimizu, D. Suzuki, T. Tsurumaru, T. Sugawara, M. Shiozaki, and T. Fujino  IEICE Trans. Fundamentals  97-A/ 1, 264-274  2014/01 
Paper  Yes  Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current  Y. Hayashi, N. Homma, T. Mizuki, T. Sugawara, Y. Kayano, T. Aoki, S. Minegishi, A. Satoh, H. Sone, and H. Inoue  IEICE Trans. Electronics  E95-C/ 6, 1089-1097  2012/06 
Paper  Yes  Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates  Joint  M. Knezevic, K. Kobayashi, J. Ikegami, S. Matsuo, A. Satoh, U. Kocabas, J. Fan, T. Katashita, T. Sugawara, K. Sakiyama, I. Verbauwhede, K. Ohta, N. Homma, and T. Aoki  IEEE Trans. VLSI Syst.  20/ 5, 827-840  2012/05 
Paper  Yes  A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments  S. Endo, T. Sugawara, N. Homma, T. Aoki, and A. Satoh  IEICE Trans, Fundamentals  95-A/ 1, 263-266  2012/01 
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Intellectual property rights
Patent  攻撃検出装置  PCT/JP2015/064025  2015/05/15  Filed 
Patent  半導体装置  特願2013-15227  2013/01/30  Filed 
Patent  誤り検出機能を備える符号化又は復号処理のための回路構成  特願2008-130361  2009/05/19  Filed 
Patent  乱数拡大装置、乱数拡大方法及び乱数拡大プログラム  JP6058245B2  2015/01/15  6058245  2017/01/11  Registered 
Patent  ソフトウェア更新装置及びソフトウェア更新プログラム  JP6053950B2  2013/11/06  6053950  2016/12/27  Registered 
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Awards
SCIS論文賞  2016/01/22 
ICSS研究賞  2015/06/12 
所長表彰  2015/06/10 
優秀発表賞  2015/04/21 
FIPS140-3とISO/IEC17825のドラフト作成に係る顕著な貢献への感謝状  2015/02/01 
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