| No. |
種別 |
査読の有無 |
標題 |
単著・共著区分 |
著者 |
誌名 |
巻号頁 |
出版日 |
ISSN |
DOI |
URL |
| 1 |
一般論文
|
有
|
A 286 F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser against Laser Fault Injection Attack on Cryptographic Processor
|
共著
|
K. Matsuda, T. Fujii, N. Shoji, T. Sugawara, K. Sakiyama, Y. Hayashi, M. Nagata, and N. Miura
|
IEEE Journal of Solid State Circuits
|
53/ 11, 1-9
|
2018
|
|
|
|
| 2 |
一般論文
|
有
|
3-Share Threshold Implementation of AES S-box without Fresh Randomness
|
共著
|
T. Sugawara
|
IACR Transactions on Cryptographic Hardware and Embedded Systems
|
2019(1), 123-145
|
2018/11/09
|
2569-2925
|
|
|
| 3 |
一般論文
|
有
|
SAEB: A Lightweight Blockcipher-Based AEAD Mode of Operation
|
共著
|
Y. Naito, M. Matsui, T. Sugawara, and D. Suzuki
|
IACR Transactions on Cryptographic Hardware and Embedded Systems
|
2018(2), 192-217
|
2018/08/05
|
2569-2925
|
|
|
| 4 |
一般論文
|
有
|
Q-class Authentication System for Double Arbiter PUF
|
共著
|
R. Yashiro, T. Sugawara, M. Iwamoto, and K. Sakiyama
|
IEICE Trans. Fundamentals
|
E101-A/ 1, 129-137
|
2018/01
|
|
|
|
| 5 |
一般論文
|
有
|
Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack
|
共著
|
T. Sugawara, D. Suzuki, and M. Saeki
|
IEICE Trans. Fundamentals
|
E99-A/ 7, 1323-1333
|
2017/07
|
|
|
|
| 6 |
一般論文
|
有
|
Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication
|
共著
|
K. Shimizu, D. Suzuki, T. Tsurumaru, T. Sugawara, M. Shiozaki, and T. Fujino
|
IEICE Trans. Fundamentals
|
97-A/ 1, 264-274
|
2014/01
|
|
|
|
| 7 |
一般論文
|
有
|
Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current
|
|
Y. Hayashi, N. Homma, T. Mizuki, T. Sugawara, Y. Kayano, T. Aoki, S. Minegishi, A. Satoh, H. Sone, and H. Inoue
|
IEICE Trans. Electronics
|
E95-C/ 6, 1089-1097
|
2012/06
|
|
|
|
| 8 |
一般論文
|
有
|
Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates
|
共著
|
M. Knezevic, K. Kobayashi, J. Ikegami, S. Matsuo, A. Satoh, U. Kocabas, J. Fan, T. Katashita, T. Sugawara, K. Sakiyama, I. Verbauwhede, K. Ohta, N. Homma, and T. Aoki
|
IEEE Trans. VLSI Syst.
|
20/ 5, 827-840
|
2012/05
|
|
|
|
| 9 |
一般論文
|
有
|
A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments
|
|
S. Endo, T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
IEICE Trans, Fundamentals
|
95-A/ 1, 263-266
|
2012/01
|
|
|
|
| 10 |
一般論文
|
有
|
An On-chip Glitchy-clock Generator for Testing Fault Injection Attacks
|
共著
|
S. Endo, T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
Journal of Cryptographic Engineering
|
1/ 4, 265-270
|
2011/12
|
|
|
|
| 11 |
一般論文
|
有
|
ハッシュ関数Luffaのハードウェア実装
|
共著
|
片下敏宏, 佐藤証, 菅原健, 本間尚文, 佐藤証, 青木孝文
|
情報処理学会論文誌
|
52/ 12, 3755-3765
|
2011/12
|
|
|
|
| 12 |
一般論文
|
有
|
High-performance Architecture for Concurrent Error Detection for AES Processors
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
IEICE Trans. Fundamentals
|
E94-A/ 10, 1971-1980
|
2011/10
|
|
|
|
| 13 |
一般論文
|
有
|
Profiling Attack using Multivariate Regression Analysis
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
IEICE Electronics Express
|
7/ 15, 1139-1144
|
2010/08
|
|
|
|
| 14 |
一般論文
|
有
|
ハッシュ関数Whirlpoolの高スケーラブル回路アーキテクチャ
|
共著
|
菅原健, 本間尚文, 佐藤証，青木孝文
|
情報処理学会論文誌
|
50/ 11, 2618-2632
|
2009/11
|
|
|
|
| 15 |
一般論文
|
有
|
High-Performance Hardware Architectures for Galois Counter Mode
|
共著
|
A. Satoh, T. Sugawara, and T. Aoki
|
IEEE Trans. Computers
|
58/ 7, 917-930
|
2009/07
|
|
|
|
| 16 |
一般論文
|
有
|
A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks
|
共著
|
N. Homma, S. Nagashima, T. Sugawara, T. Aoki, and A. Satoh
|
IEICE Trans. Fundamentals
|
E91-A/ 1, 193-202
|
2008/01
|
|
|
|
| 17 |
招待論文
|
有
|
Reversing stealthy dopant-level circuits
|
共著
|
T. Sugawara, D. Suzuki, R. Fujii, S. Tawa, R. Hori, M. Shiozaki, and T. Fujino
|
Journal of Cryptographic Engineering
|
5/ 2, 85-94
|
2015/07
|
|
|
|
| 18 |
招待論文
|
有
|
On measurable side-channel leaks inside ASIC design primitives
|
共著
|
T. Sugawara, D. Suzuki, M. Saeki, M. Shiozaki, and T. Fujino
|
Journal of Cryptographic Engineering
|
4/ 1, 59-73
|
2014/04
|
|
|
|
| 19 |
国際会議プロシーディングス等
|
有
|
Recovering Memory Access Sequence with Differential Flush+Reload Attack
|
共著
|
Z. Yuan, Y. Li, K. Sakiyama, T. Sugawara, and J. Wang
|
14th International Conference on Information Security Practice and Experience (ISPEC 2018)
|
11125, 424-439
|
2018/09
|
|
|
|
| 20 |
国際会議プロシーディングス等
|
有
|
Sensor CON-Fusion: Defeating Kalman Filter in Signal Injection Attack
|
共著
|
S. Nashimoto, D. Suzuki, T. Sugawara, and K. Sakiyama
|
ACM Asia Conference on Computer and Communications Security (AsiaCCS 2018)
|
511-524
|
2018/06
|
|
|
|
| 21 |
国際会議プロシーディングス等
|
有
|
A 286F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack
|
共著
|
K. Matsuda, T. Fujii, N. Shoji, T. Sugawara, K. Sakiyama, Y. Hayashi, M. Nagata, and N. Miura
|
2018 IEEE International Solid-State Circuits Conference (ISSCC 2018)
|
2018, 11-15
|
2018/01
|
|
|
|
| 22 |
国際会議プロシーディングス等
|
有
|
Exploiting Bitflip Detector for Non-Invasive Probing and its Application to Ineffective Fault Analysis
|
共著
|
T. Sugawara, N. Shoji, K. Sakiyama, K. Matsuda, N. Miura, and M. Nagata
|
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC’17)
|
49-56
|
2017/09
|
|
|
|
| 23 |
国際会議プロシーディングス等
|
有
|
Efficient Software Implementation of Modular Multiplication in Prime Fields on TI’s DSP TMS320C6678
|
共著
|
E. Miyamoto, T. Sugawara, and K. Sakiyama
|
International Workshop on Information Security Applications (WISA’17)
|
10763, 261-273
|
2017/08
|
|
|
|
| 24 |
国際会議プロシーディングス等
|
有
|
Output Masking of Tweakable Even-Mansour can be Eliminated for Message Authentication Code
|
共著
|
S. Hirose, Y. Naito, and T. Sugawara
|
Selected Areas in Cryptography (SAC 2016)
|
10532, 341-359
|
2016/08
|
|
|
|
| 25 |
国際会議プロシーディングス等
|
有
|
PUF as a Sensor
|
共著
|
K. Shimizu, T. Sugawara, D. Suzuki
|
2015 IEEE 4th Global Conference on Consumer Electronics (GCCE)
|
88-92
|
2015/10
|
|
|
|
| 26 |
国際会議プロシーディングス等
|
有
|
Two Operands of Multipliers in Side-Channel Attack
|
|
T. Sugawara, D. Suzuki, M. Saeki
|
6th International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2015)
|
LNCS9064, 64-78
|
2015/04
|
|
|
|
| 27 |
国際会議プロシーディングス等
|
有
|
Reversing Stealthy Dopant-Level Circuits
|
共著
|
T. Sugawara, D. Suzuki, R. Fujii, S. Tawa, R. Hori, M. Shiozaki, T. Fujino
|
Cryptographic Hardware and Embedded Systems (CHES 2014)
|
LNCS8731, 112-126
|
2014/09
|
|
|
|
| 28 |
国際会議プロシーディングス等
|
有
|
On Measurable Side-Channel Leaks Inside ASIC Design Primitives
|
共著
|
T. Sugawara, D. Suzuki, M. Saeki, M. Shiozaki, T. Fujino
|
Cryptographic Hardware and Embedded Systems (CHES 2013)
|
LNCS8086, 159-178
|
2013/08
|
|
|
|
| 29 |
国際会議プロシーディングス等
|
有
|
Circuit Simulation for Fault Sensitivity Analysis and Its Application to Cryptographic LSI
|
|
T. Sugawara, D. Suzuki, T. Katashita
|
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC2012)
|
16-23
|
2012/09
|
|
|
|
| 30 |
国際会議プロシーディングス等
|
有
|
Non-invasive Trigger-free Fault Injection Method Based on Intentional Electromagnetic Interference
|
共著
|
Y. Hayashi, N. Homma, T. Sugawara, T. Mizuki, T. Aoki, and H. Sone
|
The Non-Invasive Attack Testing Workshop (NIAT 2011)
|
xx-yy
|
2011/09
|
|
|
|
| 31 |
国際会議プロシーディングス等
|
有
|
Non-Invasive EMI-Based Fault Injection Attack against Cryptographic Modules
|
共著
|
Y. Hayashi, T. Sugawara, N. Homma, T. Mizuki, T. Aoki, and H. Sone
|
International Symposium on Electromagnetic Compatibility (EMC2011)
|
763-767
|
2011/08
|
|
|
|
| 32 |
国際会議プロシーディングス等
|
有
|
An on-chip glitchy-clock generator and its application to safe-error attack
|
共著
|
S. Endo, T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
Second International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2011)
|
175-182
|
2011/02
|
|
|
|
| 33 |
国際会議プロシーディングス等
|
有
|
Development of an On-Chip Micro Shielded-Loop Probe to Evaluate Performance of Magnetic Film to Protect a Cryptographic LSI from Electromagnetic Analysis
|
共著
|
M. Yamaguchi, H. Toriduka, S. Kobayashi, T. Sugawara, N. Homma, A. Satoh, and T. Aoki
|
International Symposium on Electromagnetic Compatibility (EMC2010)
|
103-108
|
2010/07
|
|
|
|
| 34 |
国際会議プロシーディングス等
|
有
|
Information Leakage from Cryptographic Hardware via Common-Mode Current
|
|
Y. Hayashi, T. Sugawara, Y. Kayano, N. Homma, T. Mizuki, A. Satoh, T. Aoki, S. Minegishi, H. Sone, and H. Inoue
|
International Symposium on Electromagnetic Compatibility (EMC2010)
|
109-114
|
2010/07
|
|
|
|
| 35 |
国際会議プロシーディングス等
|
有
|
Hardware Implementations of Hash Function Luffa
|
|
A. Satoh, T. Katashita, T. Sugawara, N. Homma, and T. Aoki
|
International Symposium on Hardware-Oriented Security and Trust (HOST 2010)
|
130-134
|
2010/06
|
|
|
|
| 36 |
国際会議プロシーディングス等
|
有
|
Biasing Power Traces to Improve Correlation in Power Analysis Attacks
|
共著
|
Y. Kim, T. Sugawara, N. Homma, T. Aoki and A. Satoh
|
First International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE 2010)
|
77-80
|
2010/02
|
|
|
|
| 37 |
国際会議プロシーディングス等
|
有
|
Side Channel Attack to Magnetic Near Field of Cryptographic LSI and its Countermeasure by means of Magnetic Thin Film
|
共著
|
M. Yamaguchi, H. Toriduka, S. Kobayashi, T. Sugawara, N. Homma, A. Satoh, T. Aoki
|
9th Soft Magnetic Materials Conference (SMM19)
|
A3-11, xx-yy
|
2009/09
|
|
|
|
| 38 |
国際会議プロシーディングス等
|
有
|
Mechanism behind Information Leakage in Electromagnetic Analysis of Cryptographic Modules
|
共著
|
T. Sugawara, Y. Hayashi, N. Homma, T. Mizuki, T. Aoki, H. Sone, and A. Satoh
|
World Conference on Information Security Applications (WISA2009)
|
LNCS 5932, 66-78
|
2009/08
|
|
|
|
| 39 |
国際会議プロシーディングス等
|
有
|
Differential Power Analysis of AES ASIC Implementations with Various S-box Circuits
|
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
European Conference on Circuit Theory and Design (ECCTD2009)
|
395-398
|
2009/08
|
|
|
|
| 40 |
国際会議プロシーディングス等
|
有
|
Development of Side-Channel Attack Standard Evaluation Environment
|
共著
|
T. Katashita, A. Satoh, T. Sugawara, N. Homma, and T. Aoki
|
European Conference on Circuit Theory and Design (ECCTD2009)
|
403-408
|
2009/08
|
|
|
|
| 41 |
国際会議プロシーディングス等
|
有
|
An Analysis of Information Leakage from a Cryptographic Hardware via Common-Mode Current
|
|
Y. Hayashi, T. Sugawara, Y. Kayano, N. Homma, T. Mizuki, A. Satoh, T. Aoki, S. Minegishi, H. Sone, and H. Inoue
|
International Symposium on Electromagnetic Compatibility (EMC'09)
|
17-20
|
2009/07
|
|
|
|
| 42 |
国際会議プロシーディングス等
|
有
|
Spectrum Analysis on Cryptographic Modules to Counteract Side-Channel Attacks
|
|
T. Sugawara, Y. Hayashi, N. Homma, T. Mizuki, T. Aoki, H. Sone, and A. Satoh
|
International Symposium on Electromagnetic Compatibility (EMC'09)
|
21-24
|
2009/07
|
|
|
|
| 43 |
国際会議プロシーディングス等
|
有
|
Enhanced Correlation Power Analysis using Key Screening Techniques
|
共著
|
T. Katashita, A. Satoh, T. Sugawara, N. Homma, and T. Aoki
|
International Conference on Reconfigurable Computing and FPGAs (ReConFig'08)
|
403-408
|
2008/12
|
|
|
|
| 44 |
国際会議プロシーディングス等
|
有
|
Compact ASIC Architectures for the 512-bit Hash Function Whirlpool,
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
World Conference on Information Security Applications (WISA2008)
|
LNCS 5379, 28-40
|
2008/09
|
|
|
|
| 45 |
国際会議プロシーディングス等
|
有
|
High-performance Concurrent Error Detection Scheme for AES Hardware
|
共著
|
A. Satoh, T. Sugawara, N. Homma, and T. Aoki
|
Cryptographic Hardware and Embedded Systems (CHES2008)
|
LNCS 5154, 100-112
|
2008/08
|
|
|
|
| 46 |
国際会議プロシーディングス等
|
有
|
High-performance ASIC Implementations of the 128-bit Block Cipher CLEFIA
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
International Symposium on Circuits and Systems (ISCAS2008)
|
2925-2928
|
2008/05
|
|
|
|
| 47 |
国際会議プロシーディングス等
|
有
|
High-Speed Pipelined Hardware Architecture for Galois Counter Mode
|
共著
|
A. Satoh, T. Sugawara, and T. Aoki
|
10th Information Security Conference (ISC2007)
|
LNCS 4779, 118-129
|
2007/10
|
|
|
|
| 48 |
国際会議プロシーディングス等
|
有
|
ASIC Performance Comparison for the ISO Standard Block Ciphers
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
2nd Joint Workshop on Information Security (JWIS2007)
|
485-498
|
2007/08
|
|
|
|
| 49 |
国際会議プロシーディングス等
|
有
|
A High-Performance ASIC Implementation of the 64-bit Block Cipher CAST-128
|
共著
|
T. Sugawara, N. Homma, T. Aoki, and A. Satoh
|
International Symposium on Circuits and Systems (ISCAS2007)
|
1859-1862
|
2007/05
|
|
|
|